1. Field of the Invention
The present invention relates to a method of forming a dielectric thin film pattern and a method of forming a laminate pattern. In particular, the present invention relates to a method of forming a low loss dielectric thin film pattern by using lift-off technology. Further, the present invention preferably relates to a method of forming a laminate pattern composed of a dielectric thin film and a conductive thin film and constituting a high frequency device such as a high frequency transmission line, a high frequency resonator, a high frequency capacitance element, etc.
2. Description of the Related Art
A low dielectric loss is required for dielectric thin films which constitute high frequency devices such as high frequency transmission lines, high frequency resonators, high frequency capacitance elements, etc. For this reason, technologies such as CVD, sputtering, ablation, etc. have been used to form dielectric thin films with a low dielectric loss. Vapor deposition methods have never been used for this purpose. One of the reasons that vapor deposition methods have not been used is in that according to the vapor deposition technology, the energy of a vapor deposition particle is low (not more than about 1 eV) so that it is difficult to tightly-form a dielectric thin film exhibiting low loss.
It has been generally assumed that when the temperature of a substrate is about room temperature, a low loss film can not be produced using vapor deposition technology. In order to obtain a low loss film using vapor deposition technology, it has been necessary to either heat the substrate, or utilize ion assist, ion plating, etc. However, according to each of these methods, the substrate must be heated to a high temperature. Because of the heat resistances of photoresists used in the lift-off technology, it has been impossible to form a low loss thin film using lift-off technology.
In the case that a laminate pattern (wiring pattern) composed of a dielectric thin film and a conductor thin film is partially formed on a substrate, for example, a laminate pattern comprising a dielectric thin film and a conductor thin film and constituting a high frequency capacitance element having a MIM (metal--insulator metal) structure, ordinarily, the laminate pattern has been produced according to the methods described below.
According to a first method, a conductor thin film is formed as a lower layer on the overall surface of a substrate by vapor deposition, sputtering, or the like. Subsequently, a dielectric thin film is formed by CVD, sputtering, ablation, or the like. Then, a conductor thin film is formed as an upper layer by vapor deposition, sputtering, or the like, whereby a laminate film having an MIM structure is formed. Thereafter, a resist pattern is formed thereon. The laminate film lying in an unnecessary area, exposed through the resist pattern, is removed by etching to obtain a laminate pattern.
A second method is as follows. First, a conductor thin film is formed as a lower layer on the overall surface of a substrate by vapor deposition, sputtering, or the like. Thereafter, a resist pattern is formed thereon, and only the conductor film as the lower layer is etched to be patterned in a desired pattern. Otherwise, a resist pattern is formed previously in an area where the conductor thin film is not required. The conductor thin film is formed as the lower layer on the substrate via the resist pattern by vapor deposition or the like. The conductor thin film formed on the resist pattern is separated from the substrate together with the resist pattern. Thus, the conductor thin film as the lower layer is patterned using lift-off technology. Subsequently, a dielectric thin film is formed on the whole surface of the substrate and on the patterned conductor thin film as the lower layer by CVD, sputtering, ablation, or the like. A resist pattern is formed on the dielectric thin film, and the area where the dielectric thin film is not required is removed by etching. Further, in the same manner as employed for the formation of the conductor thin film as the lower layer, a conductor thin film if formed as an upper layer on the dielectric thin film, and patterned. When the dielectric thin film and the conductor thin film as the upper layer are patterned, they are registered with the conductor thin film as the lower layer and the dielectric thin film which are already patterned, respectively, and then, patterned to have the same pattern shape.
However, the first and the second methods have the problem that a dielectric material such as Al.sub.2 O.sub.3 or the like can not be etched with a high precision even if dry etching such as RIE or the like is used. For this reason, when the formation of a high precision dielectric thin film pattern is desired, the dielectric thin film materials which are available using any of these methods are extremely limited. In some cases, the dielectric thin film materials can be mechanically removed by ion milling or the like. However, in this case, damage to underlying materials is problematic.
As regards to dielectric thin film materials capable of being etched, the etching is expensive, since a resist pattern is formed, and then, etching is carried out by use of a resist pattern as a mask. In particular, according to the second method, it is necessary to pattern the resist film three times, which is highly costly.
For the above-described reasons, there has been a need for a single method for forming a low loss dielectric thin film pattern or a laminate pattern composed of a low loss dielectric thin film and a conductor thin film using lift-off technology. In particular, it has been desired that a laminate pattern composed of a low loss dielectric thin film and a conductor thin film be produced using lift-off technology where the conductor thin film and the dielectric thin film are vapor-deposited on one resist pattern layer, one after the other under vacuum conditions.